"Instead of starting from a sequential design, we’re building our processor to have thousands of cores operating in parallel. This requires moving beyond the notion of shared mutable memory and linear instruction sequences. To make this possible, we’re working in tandem on the open-source language Vine, which has been designed from the beginning to target a new wave of parallel-first architectures."
I wish them well but from their Vine language docs:
"For example, a < b < c is equivalent to (a < b) & (b < c)"
So how do you parallelize that? You can run the first part on 2 cores in parallel, but there is still a single check, a single cache, a single CPU for this to go through to complete the operation, right?
>Instead of starting from a sequential design, we’re building our processor to have thousands of cores operating in parallel.
Sounds like tweaking a gpu so it can be used like a cpu. There are some proof of concepts running unix on a gpu, along with some toy projects like gameboy emulators. I think an Nvidia engineer even tried to see if they could get linux working which helps explore what is deficient. And there is this https://github.com/robertcprice/nCPU .
I always wonder where will x86 be in 10 or 20 years time. As data paths widen for SIMD, how many can they possibly cram even more generations of wider and wider groups of instruction with different opcodes and characteristics.
Do you remember the 1990s everlasting arguments about RISC vs CISC? There were so many arguments (online and magazines) saying that "soon" RISC would eat CISC. And yet, it never happened. I'll be dead before the demise of x86. More likely: The computing landscape will get more complex. Probably ARM will become a legitimate competitor to x86 outside of handheld computing, and RISC V will become a legitimate competitor to ARM for single board and handheld computing.
I'm quite interested to see how this evolves. But part of me is still being sad, because hardware is rarely the bottleneck these days - as opposed to software.
Have you seen the new CPU architecture? It's on Mill. It's literally on Transputer. It's on Rock with Sun. It's literally on AMULET. You can probably find it on Itanium. Dude it's on Tesla. It's a CDC STAR original. It's on E1. You can program it on E1. You can go to E1 and program it. Get onto E1 right now. Go to E1. Dive into E1. You can E1 it. It's on E1. E1 has it for you. E1 has it for you.
In all seriousness congratulations on finding $30 million to launder and lose immediately. Hope your Porsche runs good.
Really would like to understand how the mill got going and how anyone can see it progressing at this point. I know folks are working on it on the side but it's just bleh now.
> Sources say that the company is already discussing a fast follow-up raise that would potentially value the firm at more than $1 billion. Neither round has previously been reported. Benchmark declined to comment.
Hmm. The story over at https://millcomputing.com/ always looked compelling.
Pitchbook shows it as "Out of Business" since 2019.
From the URL:
"Instead of starting from a sequential design, we’re building our processor to have thousands of cores operating in parallel. This requires moving beyond the notion of shared mutable memory and linear instruction sequences. To make this possible, we’re working in tandem on the open-source language Vine, which has been designed from the beginning to target a new wave of parallel-first architectures."
I wish them well but from their Vine language docs:
"For example, a < b < c is equivalent to (a < b) & (b < c)"
So how do you parallelize that? You can run the first part on 2 cores in parallel, but there is still a single check, a single cache, a single CPU for this to go through to complete the operation, right?
I think thats a poor example (either that, or less charitably, they're scamming investors).
They just described a common superscalar optimization thats been done since the 90s.
>Instead of starting from a sequential design, we’re building our processor to have thousands of cores operating in parallel.
Sounds like tweaking a gpu so it can be used like a cpu. There are some proof of concepts running unix on a gpu, along with some toy projects like gameboy emulators. I think an Nvidia engineer even tried to see if they could get linux working which helps explore what is deficient. And there is this https://github.com/robertcprice/nCPU .
I always wonder where will x86 be in 10 or 20 years time. As data paths widen for SIMD, how many can they possibly cram even more generations of wider and wider groups of instruction with different opcodes and characteristics.
Do you remember the 1990s everlasting arguments about RISC vs CISC? There were so many arguments (online and magazines) saying that "soon" RISC would eat CISC. And yet, it never happened. I'll be dead before the demise of x86. More likely: The computing landscape will get more complex. Probably ARM will become a legitimate competitor to x86 outside of handheld computing, and RISC V will become a legitimate competitor to ARM for single board and handheld computing.
I'm quite interested to see how this evolves. But part of me is still being sad, because hardware is rarely the bottleneck these days - as opposed to software.
Isn't this basically a GPU?
Sure looks like it.
But they are ignoring the basic lesson of "new" CPU designs from Transputer to i432 to Itanium to Transmeta.
A new CPU design is easy, it is the compiler to use it that is the hard hard part.
Looked at another way, CUDA is a huge reason NVidia is so big right now. Their GPUs are broadly similar to AMD. Their software libraries are better.
But good luck to them, perhaps they have some great new idea. We need one.
> This requires moving beyond the notion of shared mutable memory and linear instruction sequences.
Yep, and they're probably simulating/emulating their CPU design on GPUs already.
How will this be better than RISC V?
Who do you expect to answer? It's a tiny future product announcement, it neither exists, nor is it a Show HN from someone involved
a man can dream
TL;DR: it's basically Niagara/GreenArrays/etc again.
Not sure why this one will succeed where its forebears didn't.
Have you seen the new CPU architecture? It's on Mill. It's literally on Transputer. It's on Rock with Sun. It's literally on AMULET. You can probably find it on Itanium. Dude it's on Tesla. It's a CDC STAR original. It's on E1. You can program it on E1. You can go to E1 and program it. Get onto E1 right now. Go to E1. Dive into E1. You can E1 it. It's on E1. E1 has it for you. E1 has it for you.
In all seriousness congratulations on finding $30 million to launder and lose immediately. Hope your Porsche runs good.
Really would like to understand how the mill got going and how anyone can see it progressing at this point. I know folks are working on it on the side but it's just bleh now.
Maybe now the cpu arena is a patent graveyard instead of a patent minefield, some fresh developments can appear.
> Sources say that the company is already discussing a fast follow-up raise that would potentially value the firm at more than $1 billion. Neither round has previously been reported. Benchmark declined to comment.
https://www.newcomer.co/p/scoop-benchmark-backs-early-stage
VC is such a meme lmao. What’s next, Sam gonna acquire the company? No product needed!
let's re-do the OS too. we only need about 10 syscalls. authorization is totally backwards (look how android runs a user per process).
Was about time we had another Transmeta.
Bet you they will turn into yet another ML accelerator company within the year.